Research
We study how learning, optimization, and physical models can work together in chip design. Our work connects algorithms, circuits, and physical implementation, across digital, analog, and RF systems.
Learning and optimization for design
We combine learning and mathematical optimization for high-level and logic synthesis. Program and circuit structure, together with feedback from synthesis and physical design tools, help guide the search through large design spaces.
Co-design across abstraction layers
Decisions in logic, dataflow, and packaging shape what physical design can achieve. We connect these decisions through physically aware synthesis, dataflow-aware computing-in-memory layout, and chiplet placement that incorporates manufacturing constraints.
- PhyLS — AI-driven physically aware synthesis · FCS 2026
- DAMIL-DCIM+ — dataflow-aware digital CIM layout synthesis · TCAD 2025
- ULTRA-2.5D — large-scale multi-reticle chiplet placement · TCAD 2026
Analog, RF, and physics-informed design
Analog and RF design brings circuit behavior, device choices, and geometry into the same problem. We develop methods for circuit sizing and layout synthesis, physics-informed models for RF inverse design, and open tools and benchmarks for studying these problems.