Publications

You can also find my articles on my Google Scholar profile.

Books/Book Chpaters

B2b. Machine Learning for Analog Layout

B2a. Machine Learning for Analog Circuit Sizing

B1. CAD for Analog/Mixed-Signal Integrated Circuits

Journal Papers

J8. Domain Wall-Magnetic Tunnel Junction Analog Content Addressable Memory Using Current and Projected Data

J7. ISOP+: Machine Learning-Assisted Inverse Stack-Up Optimization for Advanced Package Design

J6. An In-Memory-Computing Charge-Domain Ternary CNN Classifier

J5. Hierarchical Analog and Mixed-Signal Circuit Placement Considering System Signal Flow

J4. 1- and 80-MS/s SAR ADCs in 40-nm CMOS With End-to-End Compilation

J3. Tutorial and Perspectives on MAGICAL: A Silicon-Proven Open-Source Analog IC Layout System

J2. Challenges and Opportunities Toward Fully Automated Analog Layout Design

J1. MAGICAL: An Open-Source Fully Automated Analog IC Layout System from Netlist to GDSII

Conference Papers

C36. Physically Aware Synthesis Revisited: Guiding Technology Mapping with Primitive Logic Gate Placement

C34. Revisiting Sensitivity-based Analog Sizing with Derivative-aware Bayesian Optimization and Error-Suppressed Adjoint Analysis

C33. Performance-driven Analog Routing via Heterogeneous 3DGNN and Potential Relaxation

C32. Universal Process Migration Solution of MAGICAL for Analog IC Layout Automation

C31. Universal Process Migration Solution of MAGICAL for Analog IC Layout Automation

C30. A Data-Driven Analog Circuit Synthesizer with Automatic Topology Selection and Sizing

C29. Multi-Electrostatics Based Placement for Non-Integer Multiple-Height Cells

C28. Performance-Driven Analog Layout Automation: Current Status and Future Directions

C27. A Study on Exploring and Exploiting the High-dimensional Design Space for Analog Circuit Design Automation

C26. ISOP-Yield: Yield-Aware Stack-Up Optimization for Advanced Package using Machine Learning

C25. AlphaSyn: Logic Synthesis Optimization with Efficient Monte Carlo Tree Search

C24. Practical Layout-Aware Analog/Mixed-Signal Design Automation with Bayesian Neural Networks

C23. ISOP: Machine Learning-Assisted Inverse Stack-Up Optimization for Advanced Package Design

C22. Joint Optimization of Sizing and Layout for AMS Designs: Challenges and Opportunities

C21. Reinforcement Learning Guided Detailed Routing for FinFET Custom Circuits

C20. TAG: Learning Circuit Spatial Embedding From Layouts

C19. Fuse and Mix: MACAM-Enabled Analog Activation for Energy-Efficient Neural Acceleration

C18. AutoCRAFT: Layout Automation for Custom Circuits in Advanced FinFET Technologies

C17. Automating Analog Constraint Extraction: From Heuristics to Learning

C16. Reinforcement Learning for Electronic Design Automation: Case Studies and Perspectives

C15. Generative-Adversarial-Network-Guided Well-Aware Placement for Analog Circuits

C14. OpenSAR: An OpenSource Automated End-to-end SARADC Compiler

C13. Universal Symmetry Constraint Extraction for Analog and Mixed-Signal Circuits with Graph Neural Networks

C12. Optimizer Fusion: Efficient Training with Better Locality and Parallelism

C11. An In-Memory-Computing Charge-Domain Ternary CNN Classifier

C10. MAGICAL 1.0: An Open-Source Fully-Automated AMS Layout Synthesis Framework Verified With a 40-nm 1GS/s Δ∑ ADC

C9. Exploring Logic Optimizations with Reinforcement Learning and Graph Convolutional Network

C8. Toward Silicon-Proven Detailed Routing for Analog and Mixed-Signal Circuits

C7. Effective Analog/Mixed-Signal Circuit Placement Considering System Signal Flow

C6. An Efficient Training Framework for Reversible Neural Architectures

C5. Closing the Design Loop: Bayesian Optimization Assisted Hierarchical Analog Layout Synthesis

C4. Towards Decrypting the Art of Analog Layout: Placement Quality Prediction via Transfer Learning

C3. S3DET: Detecting System Symmetry Constraints for Analog Circuits with Graph Similarity

C2. MAGICAL: Toward Fully Automated Analog IC Layout Leveraging Human and Machine Intelligence

C1. GeniusRoute: A New Routing Paradigm Using Generative Neural Network Guidance for Analog Circuits